interrupt bus

英 [ˌɪntəˈrʌpt bʌs] 美 [ˌɪntəˈrʌpt bʌs]

网络  中断总线

计算机



双语例句

  1. Crash is caused by an interrupt from a external device, such as an I/ O bus controller.
    引起崩溃的原因是外部设备出现中断,比如I/O总线控制器。
  2. Study on Shifting without Driving Force Interrupt Based on Double-Motor Hybrid Electric Bus
    双电机混合动力客车换档无动力中断的研究
  3. The I/ O APIC consists of a set of24 IRQ lines, a24-entry Interrupt Redirection Table, programmable registers, and a message unit for sending and receiving APIC messages over the APIC bus.
    APIC由24条IRQ线、一个24条目的中断重定向表、可编程寄存器和一个通过APIC总线发送和接收APIC消息的消息单元组成。
  4. Implementation of DMA and interrupt of Servo control card based on CPCI bus
    基于CPCI的伺服卡的DMA和中断研究
  5. A FPGA is used to realize the complex logical timing functions and the VXI interrupt interface of the VXI bus. With the VISA assistant in the computer, data can be transferred to the computer with high speed.
    作者利用FPGA搭建了一个VXI总线的接口电路,并在其中实现了VXI总线的多中断流程,结合计算机中的VISA助手,使数据能够通过VXI总线高速上传至计算机。
  6. During the design of VXI-bus Serial Controller Module, the functions of VXI-bus including time-sequence for VXI interface, resource management, interrupt process, bus arbitration, are accomplished.
    在VXI总线串行控制器设计中,实现了VXI总线控制器的基本功能,包括VXI总线接口时序、总线仲裁、超时处理等;
  7. The design of main circuit includes system startup and reset, memory assignment and management, interrupt response and management, external bus interface, clock and power control, system development and debugging function.
    其中,主体电路设计部分包括了系统启动与复位、内存分配与管理、中断响应与处理、外部总线接口、时钟与电源管理、系统开发与调试功能等内容;
  8. This article introduces a method of using FPGA to design a special interface chip based on PCI bus. We put forward the new concept of multicenter transmitting, have realized the DMA transmission on PCI bus, and discussed the interrupt mechanism on PCI bus.
    介绍用FPGA设计PCI总线专用接口芯片的方法,提出一个多通道传输的新概念,给出PCI总线上DMA传输的实现方法,并探讨PCI总线上的中断处理机制。
  9. In this paper, the architecture of the Advanced Programmable Interrupt Controller ( APIC) System is introduced, and the Local APIC module, I/ O APIC module and APIC BUS are discussed in detail.
    本文介绍了高级可编程中断控制器(APIC)系统的构成,并对其中的LocalAPIC模块、I/OAPIC模块以及A-PIC总线作了详细的介绍。
  10. Due to relations between hardware and software, this paper also introduces much knowledge about hardware resources of PC compatible system, such as programmable interrupt controller, system timer, PCI bus and related interface chip.
    由于软硬件的相关性,本文同时也对PC兼容体系的硬件资源有较多介绍,如可编程中断控制器、系统时钟、PCI总线及接口芯片,体现了嵌入式应用软硬件结合的突出特点。
  11. It is proposed that data acquisition is controlled by the timing interrupt which is generated by the timer or counter of industrial control computer with STD bus. The programing technique and detailed C Language source code program are given out.
    提出了一种利用STD总线工业控制机自身的定时器/计数器产生定时中断来控制数据采集的方法,给出了应用时的编程技术和具体的C语言源程序。
  12. First, the thorough analysis on VME bus interface is carried out: the operation principle and mechanism of the data transfer bus and priority interrupt bus, providing the foundation for VME interface logic design.
    首先,对VME总线接口进行了深入分析,包括数据传输总线和优先级中断总线的操作原理与运行机制,为VME接口逻辑设计提供了基础。